Research area

Our Research

From Atomic-Scale Films to Real Semiconductor Devices 

EOM Lab explores how atomically controlled thin films (ALD) enable better memory and logic technologies. We focus on device-relevant problems while training students with practical skills that translate directly to industry and graduate research.

Device-Focused Topics

Commercial Memories

DRAM: Modern DRAM performance is increasingly determined by ultrathin electrodes/dielectrics and interface quality. We study thin-film stacks and process conditions that impact leakage, reliability, and scaling.

3D NAND: 3D NAND relies on high-aspect-ratio, highly uniform thin-film deposition. We develop and evaluate process strategies that achieve conformal films and stable interfaces in complex 3D structures.

Logic ICs

In advanced logic, device scaling is limited by gate stacks and interfacial defects. We investigate materials/process routes to improve interface stability and electrical performance under realistic process constraints.

New Memories (Selector-Only Memory, etc.)

We have research experience in planar crossbar devices and are expanding toward vertical architectures (e.g., vertical crossbar / vertical SOM concepts). Our goal is to connect thin-film engineering to switching behavior, variability, and reliability at the device/array level.

Core Research Themes 

Advanced Materials & Processing

Deposition and engineering of metals, oxides, and chalcogenide compounds

Interface engineering for improved electrical performance and reliability

Materials/process selection guided by device requirements (leakage, stability, variability)

Area-Selective ALD & 3D Integration

Area-selective ALD (AS-ALD) for nanoscale patterning and self-aligned growth concepts

Process strategies for damage-minimized integration compatible with downstream modules

Extending ALD/AS-ALD toward 3D integration challenges (complex topography, integration trade-offs)

In-situ/Operando Analysis & AI Process Control

In-situ/operando approaches to understand reaction mechanisms and growth behavior

Data-driven optimization for ALD processes: linking process conditions → film properties → device impact

Integration-minded evaluation across equipment/process/device metrics

Micro Electronics

ALD-enabled structures for high-mobility channels and reliability-enhanced stacks

Device-relevant thin-film/interface design supporting memory and logic technologies

Translating atomic-scale control into measurable electrical improvements

What You Will Learn in EOM Lab

Thin-Film Process Skills

ALD-based process design, recipe optimization, and process window development

Materials Understanding

Connecting growth behavior to composition, structure, and interfaces

Fab-Oriented Device Integration

Understanding how thin-film modules fit into real semiconductor process flows (e.g., thermal budget, contamination control, patterning/etch compatibility, metrology checkpoints, and integration trade-offs)

Device Evaluation Basics

Electrical measurements (I–V, switching, endurance/retention, variability) and data interpretation

Research Workflow

Reading papers, designing experiments, analyzing results, writing reports, and presenting outcomes

Career Pathways

Semiconductor Process / Integration Engineer 

Memory, logic, BEOL, thin-film stacks

Materials & Thin-Film R&D

Precursors, deposition, interface engineering 

Device Characterization / Reliability Engineer

Eelectrical testing, variability, lifetime

Equipment & Process Development Engineer

ALD and related manufacturing tools